Open Packet Processor
- 0 Collaborators
An hardware implementation of a stateful dataplane based on XFSM. ...learn more
Overview / Usage
Open Packet Processor represents our attempt to synthesize a stateful data plane on FPGA platform. The target platform is NetFPGA SUME. Currently, we are working to improve the usage of TCAM and hash tables.
For a full description, please refer to: https://arxiv.org/abs/1605.01977